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this is preliminary information on a new product now in development or undergoing evaluation. details are subject to change without notice. october 2012 doc id 023467 rev 1 1/14 14 STL50N25N3LLH5 dual n-channel 30 v, 0.006 typ., 14.6 a powerflat? stripfet? v power mosfet in 5x6 asymmetrical double island package datasheet ? preliminary data features r ds(on) * q g industry benchmark extremely low on-resistance r ds(on) very low switching gate charge high avalanche ruggedness low gate drive power losses applications switching applications description this device is a dual n-channel power mosfet developed using stmicroelectronics? stripfet?v technology. the device has been optimized to achieve very low on-state resistance, contributing to an fom that is among the best in its class. figure 1. internal schematic diagram order code v dss r ds(on) max. i d STL50N25N3LLH5 q 1 30 v < 0.0135 12 a q 2 30 v < 0.0071 14.6 a powerflat?5x6 asymmetrical double island 1 2 3 4 8 7 6 5 d1 s 1/d2 g1 g2 s 2 1 1 3 3 3 ' $ $ $ ' !-v table 1. device summary order code marking package packaging STL50N25N3LLH5 50n25n3llh5 powerflat?5x6 asymmetrical double island tape and reel www.st.com
contents STL50N25N3LLH5 2/14 doc id 023467 rev 1 contents 1 electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 electrical characteristics (curves) for q1 . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 electrical characteristics (curves) for q2 . . . . . . . . . . . . . . . . . . . . . . . 8 3 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
STL50N25N3LLH5 electrical ratings doc id 023467 rev 1 3/14 1 electrical ratings table 2. absolute maximum ratings symbol parameter type value unit v ds drain-source voltage q 1 q 2 30 30 v v v gs gate- source voltage q 1 q 2 20 20 v v i d (1) 1. this value is accordingly r thj-c drain current (continuous) at t c = 25c q 1 q 2 25 50 a a i d (1) drain current (continuous) at t c = 100c q 1 q 2 15.6 33 a a i d (2) 2. this value is accordingly r thj-pcb drain current (continuous) at t c = 25c q 1 q 2 12 14.6 a a i d (2) drain current (continuous) at t c = 100c q 1 q 2 7.5 9.1 a a i dm (3) 3. pulse width limited by safe operating area drain current (pulsed) q 1 q 2 4 8 5 8 .4 a a p tot (1) total dissipation at t c = 25c q 1 q 2 23 50 w w p tot (2) total dissipation at t c = 25c q 1 q 2 3.12 3.12 w w e as (4) 4. starting t j = 25 c, i d = 7.5 a single pulse avalanche energy tbd mj table 3. thermal data symbol parameter type value unit r thj-pcb (1) 1. when mounted on fr-4 board of 1inch2, 2oz cu, t < 10 sec thermal resistance junction-ambient max 40 c/w r thj-c thermal resistance junction-case q 1 q 2 5.5 2.5 c/w t j thermal operating junction-ambient 150 c t stg storage temperature -55 to 150 c
electrical characteristics STL50N25N3LLH5 4/14 doc id 023467 rev 1 2 electrical characteristics (t case =25c unless otherwise specified) table 4. on/off states symbol parameter test conditions type min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a, v gs = 0 q 1 q 2 30 30 v v i dss zero gate voltage drain current (v gs = 0) v ds = 30 v q 1 q 2 1 1 a a i dss zero gate voltage drain current (v gs = 0) v ds =30 v, t c = 125 c q 1 q 2 10 10 a a i gss gate-body leakage current (v ds = 0) v gs = 20 v q 1 q 2 100 100 na na v gs(th) gate threshold voltage v ds = v gs , i d = 250 a q 1 q 2 1 1 v v r ds(on) static drain-source on resistance v gs = 10 v, i d = 6 a v gs = 10 v, i d = 7.3 a q 1 q 2 0.0126 0.006 0.0135 0.0071 r ds(on) static drain-source on resistance v gs = 4.5 v, i d = 6 a v gs = 4.5 v, i d = 7.3 a q 1 q 2 0.0166 0.0072 0.0175 0.00 8 table 5. dynamic symbol parameter test conditions type min. typ. max. unit c iss input capacitance v ds = 25 v, f = 1 mhz, v gs = 0 q 1 q 2 - 724 1500 - pf pf c oss output capacitance q 1 q 2 - 132 295 - pf pf c rss reverse transfer capacitance q 1 q 2 - 20 39 - pf pf q g total gate charge v dd = 15 v, i d = 12 a, v gs = 4.5 v (see figure 25) q 1 q 2 - 5 12 - nc nc q gs gate-source charge q 1 q 2 - 2 4 - nc nc q gd gate-drain charge q 1 q 2 - 2 4.7 - nc nc
STL50N25N3LLH5 electrical characteristics doc id 023467 rev 1 5/14 table 6. switching times symbol parameter test conditions type min. typ. max. unit t d(on) t r turn-on delay time rise time v dd =15 v, i d =6 a, r g =4.7 , v gs = 4.5 v (see figure 29) q 1 q 2 q 1 q 2 - 4 9.3 42 14.5 - ns ns ns ns t d(off) t f turn-off delay time fall time q 1 q 2 q 1 q 2 - 2.1 22.7 3.5 4.5 - ns ns ns ns table 7. source drain diode symbol parameter test conditions type min. typ. max. unit i sd source-drain current v dd =15 v, i d =6 a r g =4.7 , v gs =4.5 v q 1 q 2 - 12 14.6 a a i sdm (1) 1. pulse width limited by safe operating area. source-drain current (pulsed) q 1 q 2 - 4 8 5 8 .4 a a v sd (2) 2. pulsed: pulse duration = 300 s, duty cycle 1.5% forward on voltage i sd = 12 a, v gs = 0 q 1 q 2 - 1.1 1.1 v v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 12 a, v dd = 15 v di/dt = 100 a/s, t j = 150c (see figure 29) q 1 q 2 q 1 q 2 q 1 q 2 - 21 25 10 17.5 1.0 1.4 ns ns nc nc a a
electrical characteristics STL50N25N3LLH5 6/14 doc id 023467 rev 1 2.1 electrical characteristics (curves) for q1 figure 2. safe operating area figure 3. thermal impedance figure 4. output characteristics figure 5. transfer characteristics figure 6. normalized b vdss vs temperature figure 7. static drain-source on-resistance i d 100 10 1 0.1 0.1 1 v d s (v) 10 (a) oper a tion in thi s a re a i s limited b y m a x r d s (on) 10m s 100m s 1 s tj=150c tc=25c s ingle p u l s e 0.01 am14909v1 10 - 3 10 -2 10 -1 10 0 10 1 t p ( s ) 10 -4 10 - 3 k 0.2 0.05 0.02 0.01 s ingle p u l s e =0.5 10 -2 10 -1 10 0 10 2 0.1 pcb_powerflat i d 60 40 20 0 0 1 v d s (v) 2 (a) 3 80 100 5v 6v 4v v g s =10v 3 3 v am14910v1 i d 60 40 20 0 0 4 v g s (v) 8 (a) 2 6 80 100 v d s =4v am14911v1 bv d ss -75 t j (c) (norm) -25 75 25 125 0.90 0.95 1.00 1.05 1.10 175 i d =1ma am14912v1 r d s (on) 12.20 12.00 11.80 11.60 0 10 i d (a) (m ) 5 15 12.40 12.60 12.80 1 3 .00 v g s =10v 20 25 3 0 am1491 3 v1
STL50N25N3LLH5 electrical characteristics doc id 023467 rev 1 7/14 figure 8. gate charge vs gate-source voltage figure 9. capacitance variations figure 10. normalized gate threshold voltage vs temperature figure 11. normalized on-resistance vs temperature figure 12. source-drain diode forward characteristics v g s 6 4 2 0 0 2 q g (nc) (v) 8 8 4 6 10 v dd =25v i d =12a 10 12 am14914v1 c 1000 100 10 1 0.1 10 v d s (v) (pf) 1 ci ss co ss cr ss am14915v1 v g s (th) 0.6 0.4 0.2 0 -75 t j (c) (norm) -25 0.8 75 25 125 1.0 175 i d =250 a am14916v1 r d s (on) 1.8 1.4 1.0 0.6 -75 t j (c) (norm) -25 75 25 125 0.8 1.2 1.6 2.0 175 i d =15a v g s =10v am14917v1 t j =-50c t j =150c t j =25c v s d 0 4 i s d (a) (v) 2 10 6 8 0.4 0.5 0.6 0.7 0.8 0.9 am0 3 818v1
electrical characteristics STL50N25N3LLH5 8 /14 doc id 023467 rev 1 2.2 electrical characteristics (curves) for q2 figure 13. safe operating area figure 14. thermal impedance figure 15. output characteristics figure 16. transfer characteristics figure 17. normalized b vdss vs temperature figure 18. static drain-source on-resistance i d 100 10 1 0.1 0.1 1 v d s (v) 10 (a) oper a tion in thi s a re a i s limited b y m a x r d s (on) 10m s 100m s 1 s tj=150c tc=25c s ingle p u l s e 0.01 am14918v1 10 - 3 10 -2 10 -1 10 0 10 1 t p ( s ) 10 -4 10 - 3 k 0.2 0.05 0.02 0.01 s ingle p u l s e =0.5 10 -2 10 -1 10 0 10 2 0.1 pcb_powerflat i d 150 100 50 0 0 2 v d s (v) 4 (a) 6 200 4v v g s =10v 8 3 v 10 12 14 16 am14919v1 i d 150 100 50 0 0 4 v g s (v) 8 (a) 2 6 200 v d s = 3 v 10 am14920v1 bv d ss -75 t j (c) (norm) -25 75 25 125 0.92 0.94 1.00 1.02 1.04 175 i d =1ma 0.96 0.98 1.06 am14921v1 r d s (on) 5.5 5.0 4.5 4.0 2 12 i d (a) (m ) 7 17 6.0 6.5 v g s =10v 22 27 am14922v1
STL50N25N3LLH5 electrical characteristics doc id 023467 rev 1 9/14 figure 19. gate charge vs gate-source voltage figure 20. capacitance variations figure 21. normalized gate threshold voltage vs temperature figure 22. normalized on-resistance vs temperature figure 23. source-drain diode forward characteristics v g s 6 4 2 0 0 5 q g (nc) (v) 20 8 10 15 10 v dd =25v i d =12a 12 am1492 3 v1 c 1500 1000 500 0 0 20 v d s (v) (pf) 10 ci ss co ss cr ss 2000 am14924v1 v g s (th) 1.0 0.8 0.6 0.4 -75 t j (c) (norm) -25 1.2 75 25 125 175 i d =250 a am14925v1 r d s (on) 1.4 1.0 0.6 -75 t j (c) (norm) -25 75 25 125 0.8 1.2 1.6 175 i d =4a v g s =10v 0.4 am14926v1 v s d 0 4 i s d (a) (v) 2 10 6 8 0.4 0.5 0.6 0.7 0.8 0.9 t j =-55c t j =175c t j =25c am14927v1
test circuits STL50N25N3LLH5 10/14 doc id 023467 rev 1 3 test circuits figure 24. switching times test circuit for resistive load figure 25. gate charge test circuit figure 26. test circuit for inductive load switching and diode recovery times figure 27. unclamped inductive load test circuit figure 28. unclamped inductive waveform figure 29. switching time waveform am01468v1 v g s p w v d r g r l d.u.t. 2200 f 3 . 3 f v dd am01469v1 v dd 47k 1k 47k 2.7k 1k 12v v i =20v=v gmax 2200 f p w i g =con s t 100 100nf d.u.t. v g am01470v1 a d d.u.t. s b g 25 a a b b r g g fa s t diode d s l=100 h f 3 . 3 1000 f v dd am01471v1 v i p w v d i d d.u.t. l 2200 f 3 . 3 f v dd am01472v1 v (br)d ss v dd v dd v d i dm i d am0147 3 v1 v d s t on td on td off t off t f t r 90 % 10 % 10 % 0 0 90 % 90 % 10 % v g s
STL50N25N3LLH5 package mechanical data doc id 023467 rev 1 11/14 4 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack is an st trademark. figure 30. package drawing table 8. powerflat? 5x6 asymmetrical double island dimentions dim. mm min. typ. max. a0.77 0.97 a1 0.03 b0.42 0.52 d 4.90 5.00? 5.10 d2 2.40 2.60 e5.906.006.10 e2 2.90 3.10 e1.27 l0.40 0.60 !-v
package mechanical data STL50N25N3LLH5 12/14 doc id 023467 rev 1 figure 31. recommended footprint (dimensions are in mm)
STL50N25N3LLH5 revision history doc id 023467 rev 1 13/14 5 revision history table 9. document revision history date revision changes 1 8 -oct-2012 1 first release.
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